Nozzle guard for a printhead

ABSTRACT

An ink jet printhead has a number of printhead chips ( 10 ). Each printhead chip ( 10 ) has a wafer substrate ( 16 ). A plurality of nozzle arrangements ( 10 ) is positioned on the wafer substrate. Each nozzle arrangement ( 22 ) has nozzle chamber walls and a roof wall that define a nozzle chamber ( 34 ) and a nozzle opening ( 24 ) in fluid communication with the nozzle chamber. An actuator ( 28 ) is operatively arranged with respect to each nozzle arrangement ( 10 ) to eject ink from the nozzle chamber through the nozzle opening. A nozzle guard ( 80 ) is positioned over the printhead chip. The nozzle guard has a support structure ( 86 ) and a planar cover member ( 82 ). The planar cover member is positioned on the support structure. The planar cover member defines a plurality of passages ( 84 ). Each passage ( 84 ) is in register with a respective nozzle opening ( 24 ). The planar cover member ( 82 ) is less than 300 microns thick.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a 371 of International Application No. PCT/AU02/01061, filed Aug. 6, 2002, which is a continuation of U.S. application Ser. No. 10/171,989, filed Jun. 17, 2002, issued as U.S. Pat. No. 6,557,970.

FIELD OF THE INVENTION

This invention relates to ink jet printheads. More particularly, the invention relates to an ink jet printhead having at least one printhead chip that includes a nozzle guard to protect the chip.

BACKGROUND TO THE INVENTION

As set out in the material incorporated by reference, the Applicant has developed ink jet printheads that can span a print medium and incorporate up to 84 000 nozzle assemblies.

These printheads includes a number of printhead chips. The printhead chips include micro-electromechanical components which physically act on ink to eject ink from the printhead chips. Such components are delicate and require careful handling to avoid damage.

Applicant has conceived a means for protecting such chips.

SUMMARY OF THE INVENTION

According to the invention there is provided an ink jet printhead which comprises

at least one printhead chip that comprises

-   -   a wafer substrate;     -   a plurality of nozzle arrangements positioned on the wafer         substrate, each nozzle arrangement having nozzle chamber walls         and a roof wall that define a nozzle chamber and a nozzle         opening in fluid communication with said nozzle chamber; and     -   an actuator that is operatively arranged with respect to each         nozzle arrangement to eject ink from said nozzle chamber through         the nozzle opening on demand; and

a nozzle guard positioned over the printhead chip, the nozzle guard comprising

-   -   a support structure that extends from the printhead chip; and     -   a planar cover member positioned on the support structure, the         planar cover member defining a plurality of passages, each         passage being in register with a respective nozzle opening, the         planar cover member being less than approximately 300 microns         thick.

The support structure of the nozzle guard may define a number of openings that permit the ingress of air into a region between the printhead chip and the cover member, so that the air can pass through the passages.

The cover member and the support structure may be defined by a wafer substrate.

In this specification, the term “nozzle” is to be understood as an element defining an opening and not the opening itself.

The nozzle may comprise a crown portion, defining the opening, and a skirt portion depending from the crown portion, the skirt portion forming a first part of a peripheral wall of the nozzle chamber.

The printhead may include an ink inlet aperture defined in a floor of the nozzle chamber, a bounding wall surrounding the aperture and defining a second part of the peripheral wall of the nozzle chamber. It will be appreciated that said skirt portion is displaceable relative to the substrate and, more particularly, towards and away from the substrate to effect ink ejection and nozzle chamber refill, respectively. Said bounding wall may then serve as an inhibiting means for inhibiting leakage of ink from the chamber. Preferably, the bounding wall has an inwardly directed lip portion or wiper portion which serves a sealing purpose, due to the viscosity of the ink and the spacing between said lip portion and the skirt portion, for inhibiting ink ejection when the nozzle is displaced towards the substrate.

Preferably, the actuator is a thermal bend actuator. Two beams may constitute the thermal bend actuator, one being an active beam and the other being a passive beam. By “active beam” is meant that a current is caused to flow through the active beam upon activation of the actuator whereas there is no current flow through the passive beam. It will be appreciated that, due to the construction of the actuator, when a current flows through the active beam it is caused to expand due to resistive heating. Due to the fact that the passive beam is constrained, a bending motion is imparted to the connecting member for effecting displacement of the nozzle.

The beams may be anchored at one end to an anchor mounted on, and extending upwardly from, the substrate and connected at their opposed ends to the connecting member. The connecting member may comprise an arm having a first end connected to the actuator with the nozzle connected to an opposed end of the arm in a cantilevered manner. Thus, a bending moment at said first end of the arm is exaggerated at said opposed end to effect the required displacement of the nozzle.

The printhead may include a plurality of nozzles each with their associated actuators and connecting members, arranged on the substrate. Each nozzle, with its associated actuator and connecting member, may constitute a nozzle assembly.

The printhead may be formed by planar monolithic deposition, lithographic and etching processes and, more particularly, the nozzle assemblies may be formed on the printhead by these processes.

The substrate may include an integrated drive circuit layer. The integrated drive circuit layer may be formed using a CMOS fabrication process.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention is now described, by way of example, with reference to the accompanying diagrammatic drawings in which:

FIG. 1 shows a three dimensional, schematic view of a nozzle assembly of a printhead chip for an ink jet printhead in accordance with the invention;

FIGS. 2 to 4 show a three dimensional, schematic illustration of an operation of the nozzle assembly of FIG. 1;

FIG. 5 shows a three-dimensional view of an array of the nozzle assemblies of FIGS. 1 to 4 constituting the printhead chip;

FIG. 6 shows, on an enlarged scale, part of the array of FIG. 5;

FIG. 7 shows a three dimensional view of the ink jet printhead chip with a nozzle guard positioned over the printhead chip;

FIGS. 8 a to 8 r show three-dimensional views of steps in the manufacture of a nozzle assembly of an ink jet printhead;

FIGS. 9 a to 9 r show sectional side views of the manufacturing steps;

FIGS. 10 a to 10 k show layouts of masks used in various steps in the manufacturing process;

FIGS. 11 a to 11 c show three-dimensional views of an operation of the nozzle assembly manufactured according to the method of FIGS. 8 and 9; and

FIGS. 12 a to 12 c show sectional side views of an operation of the nozzle assembly manufactured according to the method of FIGS. 8 and 9.

DETAILED DESCRIPTION OF THE DRAWINGS

In FIG. 1 of the drawings, reference 10 indicates a nozzle assembly of a printhead chip of a printhead, in accordance with the invention, is designated generally by the reference numeral 10. The printhead has a plurality of printhead chips 10 arranged in an array 14 (FIGS. 5 and 6) on a silicon substrate 16. The array 14 will be described in greater detail below.

The nozzle assembly 10 includes a silicon substrate or wafer 16 on which a dielectric layer 18 is deposited. A CMOS passivation layer 20 is deposited on the dielectric layer 18.

Each nozzle assembly 10 includes a nozzle 22 defining a nozzle opening 24, a connecting member in the form of a lever arm 26 and an actuator 28. The lever arm 26 connects the actuator 28 to the nozzle 22.

As shown in greater detail in FIGS. 2 to 4 of the drawings, the nozzle 22 comprises a crown portion 30 with a skirt portion 32 depending from the crown portion 30. The skirt portion 32 forms part of a peripheral wall of a nozzle chamber 34 (FIGS. 2 to 4 of the drawings). The nozzle opening 24 is in fluid communication with the nozzle chamber 34. It is to be noted that the nozzle opening 24 is surrounded by a raised rim 36 which “pins” a meniscus 38 (FIG. 2) of a body of ink 40 in the nozzle chamber 34.

An ink inlet aperture 42 (shown most clearly in FIG. 6 of the drawings) is defined in a floor 46 of the nozzle chamber 34. The aperture 42 is in fluid communication with an ink inlet channel 48 defined through the substrate 16.

A wall portion 50 bounds the aperture 42 and extends upwardly from the floor portion 46. The skirt portion 32, as indicated above, of the nozzle 22 defines a first part of a peripheral wall of the nozzle chamber 34 and the wall portion 50 defines a second part of the peripheral wall of the nozzle chamber 34.

The wall 50 has an inwardly directed lip 52 at its free end which serves as a fluidic seal which inhibits the escape of ink when the nozzle 22 is displaced, as will be described in greater detail below. It will be appreciated that, due to the viscosity of the ink 40 and the small dimensions of the spacing between the lip 52 and the skirt portion 32, the inwardly directed lip 52 and surface tension function as a seal for inhibiting the escape of ink from the nozzle chamber 34.

The actuator 28 is a thermal bend actuator and is connected to an anchor 54 extending upwardly from the substrate 16 or, more particularly, from the CMOS passivation layer 20. The anchor 54 is mounted on conductive pads 56 which form an electrical connection with the actuator 28.

The actuator 28 comprises a first, active beam 58 arranged above a second, passive beam 60. In a preferred embodiment, both beams 58 and 60 are of, or include, a conductive ceramic material such as titanium nitride (TiN).

Both beams 58 and 60 have their first ends anchored to the anchor 54 and their opposed ends connected to the arm 26. When a current is caused to flow through the active beam 58 thermal expansion of the beam 58 results. As the passive beam 60, through which there is no current flow, does not expand at the same rate, a bending moment is created causing the arm 26 and thus the nozzle 22 to be displaced downwardly towards the substrate 16 as shown in FIG. 3 of the drawings. This causes an ejection of ink through the nozzle opening 24 as shown at 62 in FIG. 3 of the drawings. When the source of heat is removed from the active beam 58, i.e. by stopping current flow, the nozzle 22 returns to its quiescent position as shown in FIG. 4 of the drawings. When the nozzle 22 returns to its quiescent position, an ink droplet 64 is formed as a result of the breaking of an ink droplet neck as illustrated at 66 in FIG. 4 of the drawings. The ink droplet 64 then travels on to the print media such as a sheet of paper. As a result of the formation of the ink droplet 64, a “negative” meniscus is formed as shown at 68 in FIG. 4 of the drawings. This “negative” meniscus 68 results in an inflow of ink 40 into the nozzle chamber 34 such that a new meniscus 38 (FIG. 2) is formed in readiness for the next ink drop ejection from the nozzle assembly 10.

Referring now to FIGS. 5 and 6 of the drawings, the nozzle array 14 is described in greater detail. The array 14 is for a four-color printhead. Accordingly, the array 14 includes four groups 70 of nozzle assemblies, one for each color. Each group 70 has its nozzle assemblies 10 arranged in two rows 72 and 74. One of the groups 70 is shown in greater detail in FIG. 6 of the drawings.

To facilitate close packing of the nozzle assemblies 10 in the rows 72 and 74, the nozzle assemblies 10 in the row 74 are offset or staggered with respect to the nozzle assemblies 10 in the row 72. Also, the nozzle assemblies 10 in the row 72 are spaced apart sufficiently far from each other to enable the lever arms 26 of the nozzle assemblies 10 in the row 74 to pass between adjacent nozzles 22 of the assemblies 10 in the row 72. It is to be noted that each nozzle assembly 10 is substantially dumbbell shaped so that the nozzles 22 in the row 72 nest between the nozzles 22 and the actuators 28 of adjacent nozzle assemblies 10 in the row 74.

Further, to facilitate close packing of the nozzles 22 in the rows 72 and 74, each nozzle 22 is substantially hexagonally shaped.

It will be appreciated by those skilled in the art that, when the nozzles 22 are displaced towards the substrate 16, in use, due to the nozzle opening 24 being at a slight angle with respect to the nozzle chamber 34, ink is ejected slightly off the perpendicular. It is an advantage of the arrangement shown in FIGS. 5 and 6 of the drawings that the actuators 28 of the nozzle assemblies 10 in the rows 72 and 74 extend in the same direction to one side of the rows 72 and 74. Hence, the ink droplets ejected from the nozzles 22 in the row 72 and the ink droplets ejected from the nozzles 22 in the row 74 are parallel to one another resulting in an improved print quality.

Also, as shown in FIG. 5 of the drawings, the substrate 16 has bond pads 76 arranged thereon which provide the electrical connections, via the pads 56, to the actuators 28 of the nozzle assemblies 10. These electrical connections are formed via the CMOS layer (not shown).

Referring to FIG. 7 of the drawings, a development of the invention is shown. With reference to the previous drawings, like reference numerals refer to like parts, unless otherwise specified.

A nozzle guard 80 is mounted on the substrate 16 of the array 14. The nozzle guard 80 includes a planar cover member 82 having a plurality of passages 84 defined therethrough. The passages 84 are in register with the nozzle openings 24 of the nozzle assemblies 10 of the array 14 such that, when ink is ejected from any one of the nozzle openings 24, the ink passes through the associated passage 84 before striking the print media.

The cover member 82 is mounted in spaced relationship relative to the nozzle assemblies 10 by a support structure in the form of limbs or struts 86. One of the struts 86 has air inlet openings 88 defined therein.

The cover member 82 and the struts 86 are of a wafer substrate. Thus, the passages 84 are formed with a suitable etching process carried out on the cover member 82. The cover member 82 has a thickness of not more than approximately 300 microns. This speeds the etching process. Thus, the manufacturing cost is minimized by reducing etch time.

In use, when the array 14 is in operation, air is charged through the inlet openings 88 to be forced through the passages 84 together with ink travelling through the passages 84.

The ink is not entrained in the air since the air is charged through the passages 84 at a different velocity from that of the ink droplets 64. For example, the ink droplets 64 are ejected from the nozzles 22 at a velocity of approximately 3 m/s. The air is charged through the passages 84 at a velocity of approximately 1 m/s.

The purpose of the air is to maintain the passages 84 clear of foreign particles. A danger exists that these foreign particles, such as dust particles, could fall onto the nozzle assemblies 10 adversely affecting their operation. With the provision of the air inlet openings 88 in the nozzle guard 80 this problem is, to a large extent, obviated.

Referring now to FIGS. 8 to 10 of the drawings, a process for manufacturing the nozzle assemblies 10 is described.

Starting with the silicon substrate or wafer 16, the dielectric layer 18 is deposited on a surface of the wafer 16. The dielectric layer 18 is in the form of approximately 1.5 microns of CVD oxide. Resist is spun on to the layer 18 and the layer 18 is exposed to mask 100 and is subsequently developed.

After being developed, the layer 18 is plasma etched down to the silicon layer 16. The resist is then stripped and the layer 18 is cleaned. This step defines the ink inlet aperture 42.

In FIG. 8 b of the drawings, approximately 0.8 microns of aluminum 102 is deposited on the layer 18. Resist is spun on and the aluminum 102 is exposed to mask 104 and developed. The aluminum 102 is plasma etched down to the oxide layer 18, the resist is stripped and the device is cleaned. This step provides the bond pads and interconnects to the ink jet actuator 28. This interconnect is to an NMOS drive transistor and a power plane with connections made in the CMOS layer (not shown).

Approximately 0.5 microns of PECVD nitride is deposited as the CMOS passivation layer 20. Resist is spun on and the layer 20 is exposed to mask 106 whereafter it is developed. After development, the nitride is plasma etched down to the aluminum layer 102 and the silicon layer 16 in the region of the inlet aperture 42. The resist is stripped and the device cleaned.

A layer 108 of a sacrificial material is spun on to the layer 20. The layer 108 is 6 microns of photo-sensitive polyimide or approximately 4 μm of high temperature resist. The layer 108 is softbaked and is then exposed to mask 110 whereafter it is developed. The layer 108 is then hardbaked at 400° C. for one hour where the layer 108 is comprised of polyimide or at greater than 300° C. where the layer 108 is high temperature resist. It is to be noted in the drawings that the pattern-dependent distortion of the polyimide layer 108 caused by shrinkage is taken into account in the design of the mask 110.

In the next step, shown in FIG. 8 e of the drawings, a second sacrificial layer 112 is applied. The layer 112 is either 2 μm of photo-sensitive polyimide which is spun on or approximately 1.3 μm of high temperature resist. The layer 112 is softbaked and exposed to mask 114. After exposure to the mask 114, the layer 112 is developed. In the case of the layer 112 being polyimide, the layer 112 is hardbaked at 400° C. for approximately one hour. Where the layer 112 is resist, it is hardbaked at greater than 300° C. for approximately one hour.

A 0.2 micron multi-layer metal layer 116 is then deposited. Part of this layer 116 forms the passive beam 60 of the actuator 28.

The layer 116 is formed by sputtering 1,000 Å of titanium nitride (TiN) at around 300° C. followed by sputtering 50 Å of tantalum nitride (TaN). A further 1,000 Å of TiN is sputtered on followed by 50 Å of TaN and a further 1,000 Å of TiN.

Other materials which can be used instead of TiN are TiB₂, MoSi₂ or (Ti, Al)N.

The layer 116 is then exposed to mask 118, developed and plasma etched down to the layer 112 whereafter resist, applied for the layer 116, is wet stripped taking care not to remove the cured layers 108 or 112.

A third sacrificial layer 120 is applied by spinning on 4 μM of photosensitive polyimide or approximately 2.6 μm high temperature resist. The layer 120 is softbaked whereafter it is exposed to mask 122. The exposed layer is then developed followed by hardbaking. In the case of polyimide, the layer 120 is hardbaked at 400° C. for approximately one hour or at greater than 300° C. where the layer 120 comprises resist.

A second multi-layer metal layer 124 is applied to the layer 120. The constituents of the layer 124 are the same as the layer 116 and are applied in the same manner. It will be appreciated that both layers 116 and 124 are electrically conductive layers.

The layer 124 is exposed to mask 126 and is then developed. The layer 124 is plasma etched down to the polyimide or resist layer 120 whereafter resist applied for the layer 124 is wet stripped taking care not to remove the cured layers 108, 112 or 120. It will be noted that the remaining part of the layer 124 defines the active beam 58 of the actuator 28.

A fourth sacrificial layer 128 is applied by spinning on 4 μm of photosensitive polyimide or approximately 2.6 μm of high temperature resist. The layer 128 is softbaked, exposed to the mask 130 and is then developed to leave the island portions as shown in FIG. 9 k of the drawings. The remaining portions of the layer 128 are hardbaked at 400° C. for approximately one hour in the case of polyimide or at greater than 300° C. for resist.

As shown in FIG. 81 of the drawing a high Young's modulus dielectric layer 132 is deposited. The layer 132 is constituted by approximately 1 μm of silicon nitride or aluminum oxide. The layer 132 is deposited at a temperature below the hardbaked temperature of the sacrificial layers 108, 112, 120, 128. The primary characteristics required for this dielectric layer 132 are a high elastic modulus, chemical inertness and good adhesion to TiN.

A fifth sacrificial layer 134 is applied by spinning on 2 μm of photosensitive polyimide or approximately 1.3 μm of high temperature resist. The layer 134 is softbaked, exposed to mask 136 and developed. The remaining portion of the layer 134 is then hardbaked at 400° C. for one hour in the case of the polyimide or at greater than 300° C. for the resist.

The dielectric layer 132 is plasma etched down to the sacrificial layer 128 taking care not to remove any of the sacrificial layer 134.

This step defines the nozzle opening 24, the lever arm 26 and the anchor 54 of the nozzle assembly 10.

A high Young's modulus dielectric layer 138 is deposited. This layer 138 is formed by depositing 0.2 μm of silicon nitride or aluminum nitride at a temperature below the hardbaked temperature of the sacrificial layers 108, 112, 120 and 128.

Then, as shown in FIG. 8 p of the drawings, the layer 138 is anisotropically plasma etched to a depth of 0.35 microns. This etch is intended to clear the dielectric from all of the surface except the side walls of the dielectric layer 132 and the sacrificial layer 134. This step creates the nozzle rim 36 around the nozzle opening 24 which “pins” the meniscus of ink, as described above.

An ultraviolet (UV) release tape 140 is applied. 4 μm of resist is spun on to a rear of the silicon wafer 16. The wafer 16 is exposed to mask 142 to back etch the wafer 16 to define the ink inlet channel 48. The resist is then stripped from the wafer 16.

A further UV release tape (not shown) is applied to a rear of the wafer 16 and the tape 140 is removed. The sacrificial layers 108, 112, 120, 128 and 134 are stripped in oxygen plasma to provide the final nozzle assembly 10 as shown in FIGS. 8 r and 9 r of the drawings. For ease of reference, the reference numerals illustrated in these two drawings are the same as those in FIG. 1 of the drawings to indicate the relevant parts of the nozzle assembly 10. FIGS. 11 and 12 show the operation of the nozzle assembly 10, manufactured in accordance with the process described above with reference to FIGS. 8 and 9, and these figures correspond to FIGS. 2 to 4 of the drawings.

It will be appreciated by persons skilled in the art that numerous variations and/or modifications may be made to the invention as shown in the specific embodiments without departing from the spirit or scope of the invention as broadly described. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive. 

1. An ink jet printhead which comprises: an array of nozzles on a wafer substrate, each nozzle having a nozzle chamber, a nozzle opening in fluid communication with said nozzle chamber and a thermal bend actuator operatively arranged with respect to the nozzle chamber to eject ink through the nozzle opening; and a nozzle guard comprising a cover member having a thickness of less than approximately 300 microns which covers the array of nozzles, the cover member defining a plurality of passages, each passage being spaced from and in register with a respective nozzle opening such that ink ejected through the nozzle openings passes through the respective passages.
 2. An ink jet printhead as claimed in claim 1, wherein the nozzle guard further comprises a plurality of struts which support the cover member in spaced relationship with the nozzles.
 3. An ink jet printhead as claimed in claim 1, wherein the nozzle guard is part of the wafer substrate.
 4. An ink jet printhead as claimed in claim 3, wherein the wafer substrate is a silicon substrate. 